UCMOD Connector Specification
Specification Status
| Status | Revision | Date | Notes |
|---|---|---|---|
| Draft | Draft v0.1 |
August 2026 | Initial draft definition of Main and Auxiliary connectors |
| Draft | Draft v0.2 |
September 2026 | Main Connector Pin 4 redefined from RESERVED to /RESET (active-low module reset). Modules implementing the pin are responsible for ensuring the microcontroller resets when it is driven low |
[!NOTE] Draft Specification: This document defines the draft specification for the UCMOD microcontroller module interface. The pinout, peripheral mappings, and physical form factors are currently under active development and evaluation.
The UCMOD specification defines a modular, standard interface between microcontroller modules and carrier boards. It allows microcontroller modules to be swapped or upgraded without requiring a complete redesign of the host carrier board.
You can follow the ongoing design and development on www.jktdev.co.uk.
Design Philosophy
The core goal of UCMOD is to establish predictable pin locations for common peripherals across a wide range of devices—from small 8-bit microcontrollers to feature-rich 32-bit microcontrollers.
- Standardised Capability Locations: UCMOD standardises where capabilities appear on the connector; it does not standardise or constrain the internal capabilities of the microcontroller itself.
- Predictable Fallbacks: Every signal pin has one defined primary function and a corresponding GPIO fallback (
Primary Function / Generic GPIO Number). - Carrier Board Flexibility: Carrier boards are not required to use a pin for its primary peripheral. If the carrier board does not need that peripheral, the pin can be configured and used as a general-purpose I/O (GPIO).
- Developer Responsibility: The specification does not remove the developer's responsibility to understand the target microcontroller's electrical characteristics, peripheral limitations, or pin mappings.
1-to-1 Microcontroller Pin Mapping Rule
[!IMPORTANT] Core Mapping Rule: A physical microcontroller pin should normally map to exactly one UCMOD signal position.
Multiple UCMOD positions connected to the same physical microcontroller pin are an exceptional implementation and must be explicitly documented, preferably using configurable links (such as 0 Ω resistors or solder bridges) rather than permanent electrical connections.
This rule ensures that signals appearing on different connector pins are electrically independent. If permanent aliasing is unavoidable, the affected positions must be clearly identified in the module's schematic and documentation.
UCMOD Main Connector (20-Pin)
The main UCMOD connector provides power, ground, and 12 standard GPIO positions mapped to primary communication and analogue interfaces.
Main Connector Pinout
| Pin | Function | Pin | Function |
|---|---|---|---|
| 1 | GND |
2 | 3V3 |
| 3 | GND |
4 | /RESET |
| 5 | I2C_SCL / GPIO0 |
6 | I2C_SDA / GPIO1 |
| 7 | UART_TX / GPIO2 |
8 | UART_RX / GPIO3 |
| 9 | SPI_MOSI / GPIO4 |
10 | SPI_MISO / GPIO5 |
| 11 | SPI_SCK / GPIO6 |
12 | SPI_CS / GPIO7 |
| 13 | AN0 / GPIO8 |
14 | AN1 / GPIO9 |
| 15 | AN2 / GPIO10 |
16 | AN3 / GPIO11 |
| 17 | RESERVED |
18 | GND |
| 19 | 3V3 |
20 | GND |
Peripheral Mapping Guidelines
- I2C: Primary I2C bus (
I2C_SCLon Pin 5,I2C_SDAon Pin 6). - UART: Primary serial UART interface (
UART_TXon Pin 7,UART_RXon Pin 8). - SPI: Primary SPI bus with dedicated chip select (
SPI_MOSI,SPI_MISO,SPI_SCK,SPI_CSon Pins 9–12). - Analogue Inputs: 4 analogue-capable inputs (
AN0–AN3on Pins 13–16). - Power Rails: Dual redundant 3.3 V logic power (
3V3) and ground reference (GND) pins. - Reset: Active-low reset input (
/RESETon Pin 4). - Reserved Pins: Pin 17 is reserved for future specification use and should be left unconnected on carrier boards unless specified otherwise.
Reset Signal (/RESET)
Pin 4 of the Main Connector is the module reset line, active low:
- Carrier boards may assume that driving
/RESETlow resets the module and that releasing it high allows normal operation. - It is the responsibility of the UCMOD module to ensure that the microcontroller actually resets when
/RESETis driven low. A module that implements this pin must provide whatever circuitry is required (for example, a pull-up, reset supervisor, or logic that maps the low level onto the microcontroller's native reset mechanism) so that an active-low level on Pin 4 reliably resets the module. - A module that cannot support an externally driven reset is an exception to this expectation and must explicitly document that
/RESETis non-functional on that module. - When not driven by the carrier board,
/RESETmust be treated as a no-connect by the carrier board; the module is responsible for ensuring its microcontroller boots normally in this state.
UCMOD Auxiliary Connector (20-Pin)
For more capable microcontrollers requiring additional interfaces, the UCMOD Auxiliary Connector provides secondary communication busses, dedicated interrupt lines, CAN bus connectivity, and microcontroller-specific UNIQUE pins.
Auxiliary Connector Pinout
| Pin | Function | Pin | Function |
|---|---|---|---|
| 1 | GND |
2 | AUX_UART_TX / GPIO12 |
| 3 | 3V3 |
4 | AUX_UART_RX / GPIO13 |
| 5 | AUX_I2C_SCL / GPIO14 |
6 | AUX_I2C_SDA / GPIO15 |
| 7 | AUX_SPI_SCK / GPIO16 |
8 | AUX_SPI_MISO / GPIO17 |
| 9 | AUX_SPI_MOSI / GPIO18 |
10 | AUX_SPI_CS / GPIO19 |
| 11 | AUX_IRQ / GPIO20 |
12 | UNIQUE / GPIO21 |
| 13 | UNIQUE / GPIO22 |
14 | UNIQUE / GPIO23 |
| 15 | UNIQUE / GPIO24 |
16 | UNIQUE / GPIO25 |
| 17 | AUX_CAN_TX / GPIO26 |
18 | 3V3 |
| 19 | AUX_CAN_RX / GPIO27 |
20 | GND |
Signal Details
- Secondary Busses (
AUX_): TheAUX_prefix denotes secondary communication interfaces (secondary UART, I2C, and SPI) provided in addition to the main connector. - Interrupt Request (
AUX_IRQ): Pin 11 provides a dedicated external interrupt line. - CAN Controller Interface: Pins 17 and 19 provide logic-level
AUX_CAN_TXandAUX_CAN_RXlines. This definition is controller-agnostic, supporting Classical CAN, CAN FD, or other compatible implementations connecting to an external transceiver on the carrier board. UNIQUEPins (Pins 12–16):- Dedicated escape hatch for microcontroller-specific capabilities that do not fit into common peripheral mappings (such as DAC outputs, dedicated
VREF+, specialized timer channels, or USB signals). - If a carrier board does not need the unique function, these pins fall back to standard
GPIO21throughGPIO25. -
[!WARNING] > Carrier Board Portability: > Carrier boards that depend on specific
UNIQUEfunctions become tied to the particular microcontroller family providing that feature. For maximum module interchangeability, carrier designs should prefer using standard peripheral pins or useUNIQUEpins solely as GPIOs.
Module Form Factors
The UCMOD physical standard is planned around two standard form factors:
| Form Factor | Connectors Implemented | Target Microcontrollers | Use Case |
|---|---|---|---|
| Small | Main Connector Only (20-pin) | ATtiny1614, CH32V003 / CH32V004 / CH32V005 | Compact, cost-effective nodes and simple peripheral controllers |
| Large | Main + Auxiliary Connectors (2 × 20-pin) | STM32G0B1CBT6, ESP32-C6 / ESP32-S3, RP2040, GD32V series | Feature-rich controllers needing dual busses, CAN, USB, or high I/O counts |
Standardized mechanical dimensions and connector placements (to be defined) will ensure that any Small or Large UCMOD module can be cleanly seated on compatible carrier boards.